Conference Agenda

Low Temperature Co-Fired Ceramic (LTCC) substrates are a proven material system for interposers and advanced packaging, enabling monolithic integration of functional elements within ceramic multilayers. This integration strategy is particularly attractive for complex electronic systems due to low parasitic losses and a high system figure of merit. In this context, surface-related defects such as pores are critical limitations, as they strongly influence metallization quality, electrical performance, long-term reliability, and process yield.

The broad application range of LTCC is rooted in its intrinsic microstructural variability, which allows key packaging properties such as the permittivity, coefficient of thermal expansion, and thermal conductivity to be tailored through material composition and processing. However, this same variability, combined with the sensitivity of surface characterization results to measurement conditions and data processing choices, makes reproducible and quantitative evaluation of surface defects particularly challenging. Reliable identification and scalable description of surface defects using meaningful and precise parameters are therefore essential for the upscaling of laboratory processes to industrial production and the development of adapted surface architectures for future applications, including cryogenic electronics.

This work proposes an automated workflow for the evaluation of surface roughness and porosity of LTCC substrates based on Laser Scanning Microscope (LSM) images. The approach combines standardized pre-processing steps with an algorithmic pore detection methodology to reduce user-dependent bias and improve reproducibility. Surface defects are statistically described using Poisson distribution parameters, with the extracted defect density (λ) serving as a robust basis for yield estimation. The workflow is applied to a range of LTCC substrates subjected to different surface treatments in order to assess robustness and reproducibility. In addition, the influence of individual image processing steps on the extracted roughness and porosity values is systematically investigated.

The presented workflow provides a practical and scalable tool for surface characterization, process monitoring, and substrate comparison in cryogenic electronic and packaging research. Beyond LSM-based analysis, the methodology can be directly transferable to higher-resolution surface metrology techniques such as atomic force microscopy (AFM), supporting transparent and reproducible surface defect analysis from laboratory-scale studies to industrial process development.

When PCBs in electronics assemblies absorb moisture in humid environtments, a swelling hygroscopic stress is developed in the PCB. The induced swelling stresses cause the PCB to deform and expand in volume, and may adversely affect the connected solder joints, and limit their lifetime. We developed a non-linear finite element analysis to investigate the effect of PCB moisture absorption and swelling on damage accumulation in BGA solder joints of a ceramic component. For this purpose, moisture diffution in PCB was modelled by Fick's law, which enables calculation of moisture concentration and the resulting deformation in PCB. The solder joints attaching the component to the PCB are affected by PCB deformation, and may develop inelastic stresses and strains. A viscoplastic material model was used to represent solder inelastic behaviour, and capture its damage evolution. The effect of PCB thickness on the solder maximum stress was also studied. The simulation results provide a framework to investigate the effect of humid environtments on solder joints reliability.

Modern PCBs feature complex, routing-intensive copper patterns and dense interconnects that induce significant in-plane anisotropy in stiffness and thermal expansion. Performing fully detailed Finite Element Analysis (FEA) that resolves every copper and dielectric feature is computationally prohibitive, often requiring millions of elements. While conventional equivalent isotropic modeling accelerates warpage prediction, it frequently overlooks critical anisotropic effects, leading to inaccuracies. This research proposes an AI-assisted anisotropic equivalent modeling framework designed to retain dominant in-plane anisotropy while achieving orders-of-magnitude model reduction for thermally induced warpage analysis. The workflow integrates layout-to-image processing, automated Representative Volume Element (RVE) data generation, and a Convolutional Neural Network (CNN) to predict effective properties. Key contributions include: (1) a physically consistent anisotropic-isotropic hybrid equivalence strategy; (2) a scalable Abaqus automation pipeline for high-fidelity training data generation; and (3) a fast CNN-based inference engine for predicting effective anisotropic elastic moduli and coefficients of thermal expansion (CTE). The resulting methodology bridges the gap between detailed layout information and practical simulation, enabling both rapid layout iteration and high-accuracy warpage prediction for electronic packaging applications.

Electronic equipment and devices that are essential for green‑transition technologies face significant reliability challenges due to corrosion arising from exposure to diverse environmental conditions. Main environmental factors are humidity and temperature fluctuations together with airborne pollutants, especially gases. For some application, exposure conditions can be as severe as offshore.

While exposure condition is one factor, several intrinsic factors related to electronics further contribute to corrosion failures, including PCBA design, applied bias levels, and surface cleanliness. One methodology to understand humidity effects on electronics is to physically make different PCB designs and test under required climatic conditions. However, physical testing of large number of PCB designs across the wide range of climatic conditions is both difficult and resource‑intensive. As a result, industry is looking forward to using simulation tools, such digital twins of test objects, and mathematical models to analyze the effect of humidity and related parameters to predict significant factors affecting device reliability. Computational approaches enable targeted simulation of failure mechanisms and support systematic design optimization across test conditions that would be impractical to reproduce through physical testing alone.

In this paper COMSOL Multiphysics has been employed to simulate humidity related effects on PCB surface such as leak current with two objectives. The first objective involves investigating how various PCB design parameters (variable water layer thickness, conductivity, electrode dimensions, pitch distance and supply voltage, with leakage current lines and values as output) influence surface current leakage beneath a thin water layer by using the “secondary current distribution” physics. The second objective extends this work, by using COMSOL to generate data, and some calibration lab experiments to create a failure prediction methodology using a Machine Learning tool. This tool is based on the Multivariate Adaptive Regression Splines (MARS) algorithm. Put together, this work has resulted in the creation of a modelling and prediction ecosystem which can be a significant step forward in improving high-volume testing logistics.

Robustness and reliability of electronic systems used as part of green transition technologies are challenged today due to several corrosion failure mechanisms caused by harsh environmental conditions. These conditions include climatic exposure such as humidity and temperature variations and other atmospheric pollutants. For some applications, exposure conditions can be as severe as offshore. Sustainable electrical energy production, conversion, and use is most important today as part of renewable energy, E-mobility, information technology and for other technological sectors. Efficiently functioning electronics systems are key to attaining this goal, while they are used under broader service boundaries as part of various technologies. Depending on the external climatic conditions, humidity entering into the device and formation of water layer on the Printed Circuit Board Assembly (PCBA) surface introduce risk of failure occurrence and the failure mode itself i.e. increase of leakage currents between conduction points on PCBA surface, electrochemical migration, and other corrosion issues. Level of humidity in the interior of the device and water layer formation on the PCBA surface depends not only external climate, but also on the external packaging (enclosure) design, characteristics of the PCBA surface and arrangement.

External packaging factors influencing humidity robustness are closely tied to packaging design, particularly the enclosure. Therefore, enclosure design plays a critical role in protecting electronic devices from moisture exposure. Its effectiveness depends on how the structure permits humidity ingress, the extent of damping it provides, and the delay it introduces between external climatic fluctuations and internal humidity changes. While hermetic packaging offers complete sealing from external conditions, it is often expensive and impractical for many applications. Consequently, semi‑hermetic packaging is commonly used, making it essential to design such enclosures for climatic robustness so that excessive internal humidity buildup is effectively controlled. Humidity can enter through the enclosure material if polymers are used or through intentional or unintentional openings. A well‑designed enclosure should also provide adequate damping of external humidity variations.

This talk will focus on experimental and modelling approaches for achieving climate‑compatible design of external packaging for electronic systems. It will discuss how different enclosure parameters influence micro‑climate control within the device over both short and long-time scales under varying climatic conditions. Talk will also discuss world climate data analysis that resulted in a climate App.