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DTM1_Co-design and Modeling for Chiplets
Time:
Wednesday, 11/Sept/2024:
2:40pm - 3:55pm
Session Chair: Chris Bailey , Arizona State University
Location: MOA 3 MOA 3
Presentations
2:40pm - 3:05pm Simulations of Wafer-to-wafer Bonding Dynamics and Deformation Mechanisms
Oguzhan Orkut Okudur , Serena Iacovo, Shuo Kang, Mario Gonzalez, Eric Beyne
imec, Loewen, Belgium
3:05pm - 3:30pm Signal Integrity Optimization for CoWoS Chiplet Interconnection Design Assisted by Reinforcement Learning
Weiyang Miao 1,2 , Chuan Seng Tan1,2 , Mihai Dragos Rotaru1
1 Institute of Microelectronics (IME), Singapore, Republic of Singapore; 2 School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, Republic of Singapore
3:30pm - 3:55pm Finite Element Analysis of Stress Variation of Hybrid Bonding During Miniaturization of Interconnects
Yudong Yang 1,2 , Fengze Hou1 , Chi Zhang2,4 , Rui Ma1 , Shangyang Shi2 , Fei Ding1 , Yu Zhang1 , Renxi Jin1 , Qidong Wang1 , Wei Wang2,3,4
1 Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China, People's Republic of; 2 School of Integrated Circuits, Peking University, Beijing, China, People's Republic of; 3 Beijing Advanced Innovation Center for Integrated Circuits, Beijing, China, People's Republic of; 4 National Key Lab of Micro/Nano Fabrication Technology, China, People's Republic of