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Session Overview
C10: Parallelism in Constrained and Custom Devices
Friday, 15/Sep/2017:
10:00 - 11:00

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Deeply Heterogeneous Many-Accelerator Infrastructure for HPC Architecture Exploration

José Flich1, Alessandro Cilardo2, Mario Kovaç3, Rafael Tornero1, Jose Maria Martínez1, Tomas Picornell1

1Universitat Politecnica de Valencia, Spain; 2University Federico II, Naples, Italy; 3University of Zagreb, Croatia

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