Conference Agenda

Overview and details of the sessions of this conference. Please select a date or location to show only sessions at that day or location. Please select a single session for detailed view (with abstracts and downloads if available).

 
 
Session Overview
Date: Wednesday, 11/Sept/2024
8:00am
-
2:30pm
Registration
8:00am
-
6:15pm
Exhibition Setup (1pm)
Location: Atrium
8:30am
-
10:30am
„IEEE EPS Heterogeneous Integration Roadmap“ (HIR) I
Location: Room A
PDC: “Advanced Packaging for MEMS and Sensors” I
Location: Room B
Course instructor: Horst Theuss more Info
PDC: “Automotive Electronics Reliability – Assurance Approaches and Challenges” I
Location: Room C
Course instructor: Pradeep Lall more Info
PDC: “Flip Chip Fabrication and Applications“ I
Location: Room D
Course instructor: Eric Perfecto more Info
PDC: “Printed Electronics Technologies in Green Hydrogen Generation and Conversion: principles, methods and applications“ I
Location: Room E
Course instructors: Claudia Delgado Simao and Diogo Garcia Esperança more Info
10:30am
-
10:45am
Break
10:45am
-
12:45pm
„IEEE EPS Heterogeneous Integration Roadmap“ (HIR) II
Location: Room A
PDC: “Advanced Packaging for MEMS and Sensors” II
Location: Room B
Course instructor: Horst Theuss more Info
PDC: “Automotive Electronics Reliability – Assurance Approaches and Challenges” II
Location: Room C
Course instructor: Pradeep Lall more Info
PDC: “Flip Chip Fabrication and Applications“ II
Location: Room D
Course instructor: Eric Perfecto more Info
PDC: “Printed Electronics Technologies in Green Hydrogen Generation and Conversion: principles, methods and applications“ II
Location: Room E
Course instructors: Claudia Delgado Simao and Diogo Garcia Esperança more Info
12:45pm
-
1:30pm
Lunch
1:30pm
-
1:45pm
Opening
1:45pm
-
2:30pm
Keynote 1
Location: Room A

T.B.D

Johanna M. Swan
Intel Fellow and Director of Package Research and Systems Solutions in Components Research, Technology Development, Intel Corporation




2:30pm
-
2:40pm
Room change
2:40pm
-
3:55pm
MIP1_Advanced Material Architectures for Interconnects
Location: Room A
AP1_Advanced Substrates
Location: Room B
Opto1_Photonic Module Packaging
Location: Room C
DTM1_Co-design and Modeling for Chiplets
Location: Room D
Power1_Electronics Measurement and Simulation
Location: Room E
3:55pm
-
4:25pm
Break
3:55pm
-
5:00pm
Poster Session 1
4:25pm
-
4:55pm
Exhibitor Pitches
4:55pm
-
5:00pm
Room change
5:00pm
-
6:15pm
MIP2_Advanced Interconnection Metallurgical Materials and Interconnects
Location: Room A
AP2_Hybrid Bonding I
Location: Room B
Opto2_Heterogenous PIC Integration
Location: Room C
DTM2_Reduced Order Modeling for Advanced Packaging
Location: Room D
Power2_Power Semiconductor Packaging and Cooling
Location: Room E
6:15pm
-
8:15pm
Welcome Reception
Date: Thursday, 12/Sept/2024
8:30am
-
9:15am
Keynote 2
Location: Room A

"Electronics Integration: Challenges in Computed Tomography Scanners"

Dr. Michael Hosemann
Head of Digital Electronics at Healthineers Computed Tomography Detector Center, Siemens




8:30am
-
7:00pm
Exhibition
Location: Atrium
9:15am
-
10:30am
MIP3_Low-temperature Materials for Interconnects and Packaging
Location: Room A
AP3_Hybrid Bonding II
Location: Room B
AMT1_Innovative Assembly Processes
Location: Room C
DTM3_Reliability and Virtual Prototyping
Location: Room D
Rel1_Reliability Performance and Electromigration Behavior
Location: Room E
10:30am
-
11:00am
Break
10:30am
-
11:45am
Poster Session 2
11:00am
-
12:15pm
Emerging1_From Mounting to Recycling – Highlites from Emerging Technologies
Location: Room A
AP4_Advances in WLP Technologies I
Location: Room B
AMT2_Computer-aided Process Control
Location: Room C
DTM4_Device Level Modeling
Location: Room D
Rel2_Package- and Board Level Moisture- and Thermal Stress-related Reliability Effects
Location: Room E
12:15pm
-
1:45pm
Lunch
1:45pm
-
3:15pm
Special Session
Location: Room A
The Future of Packaging in Europe - Strategies and Funding for R&D and Manufacturing I IPCEI ME/CT and Pack4EU/ EU CHIPS ACT
AP5_Advances in WLP Technologies II
Location: Room B
AMT3_Process for Enhancement of Device Robustness
Location: Room C
Special Session
Location: Room D
PUNCH - Photonic Packaging
Special Session
Location: Room E
Education I: The Education, Training and Qualification Offer for Sustainable Electronics
3:15pm
-
3:45pm
Break
3:45pm
-
5:15pm
Special Session
Location: Room A
The Future of Packaging in Europe - Strategies and Funding for R&D and Manufacturing II IPCEI ME/CT and Pack4EU/ EU CHIPS ACT
AP6_Challenges and Solutions for HI
Location: Room B
Emerging II
Location: Room C
Special Session
Location: Room D
Quantum Computing
Special Session
Location: Room E
Education II: t.b.c.
5:15pm
-
6:45pm
Panel Discussion

"Chiplet Architectures for Automotive: Package Options and Special Considerations"

E. Jan Vardaman, TechSearch International, Inc.
Vikas Gupta, ASE





7:00pm
-
7:30pm
Bus Transfer
7:30pm
-
11:30pm
Social event
Date: Friday, 13/Sept/2024
8:30am
-
9:15am
Keynote 3
Location: Room A

"Packaging: Then, Now and in the Future"

Subramanian S. Iyer
Director National Advanced Packaging Manufacturing Program, National Institute of Standards and Technology, USA




8:30am
-
1:45pm
Exhibition
Location: Atrium
9:15am
-
10:30am
MIP4_Mechanical properties of Materials for Interconnects
Location: Room A
AP7_Fan Out Packages
Location: Room B
AMT4_Hybrid Bonding, Direct Bonding, Heterogeneous Integration
Location: Room C
Flex1_Reliability Assessment of Flexible Electronics
Location: Room D
RF1_Millimeter-wave and Sub-THz Antenna-in-Package Integration for High Performance Systems
Location: Room E
10:30am
-
11:00am
Break
Session Poster 3
Location: Foyer
 
10:30am
-
11:45am
Poster Session 3
11:00am
-
12:15pm
MIP5_Microstructural Properties of Materials for Interconnects
Location: Room A
AP8_Fan Out Reliability Aspects
Location: Room B
AMT5_Advanced Materials and Processes
Location: Room C
Flex2_Formation of a Conductive Interconnection for Flexible Electronics
Location: Room D
Rel3_Progress in Failure Analytical and Material Testing Methods
Location: Room E
12:15pm
-
1:45pm
Lunch
1:45pm
-
3:00pm
MIP6_New materials for Heterogeneous Integration
Location: Room A
AP9_Panel Level Packaging
Location: Room B
AMT6_Enhanced Process Control
Location: Room C
RF2_Embedded System-in-Package and Interconnections Technologies
Location: Room D
Rel4_New Approaches in Reliability Simulation and Modelling
Location: Room E
3:00pm
-
3:10pm
Break
3:10pm
-
3:55pm
Keynote 4
Location: Room A

"Challenges and Opportunities of Semiconductor Packaging in the Chiplet Era"

Dr. Yasumitsu Orii
Senior Managing Executive Officer in 3D Assembly Division, Rapidus Corporation




3:55pm
-
4:25pm
Closing
Date: Saturday, 14/Sept/2024
8:30am
-
3:30pm
IEEE EPS Board of Governors Meeting (not public)

 
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